Field of the Invention
Embodiments of the invention generally relate to a method and apparatus for managed instruction cache prefetching.
Description of the Related Art
The instruction cache is one of the principle components of modern day microprocessors. The instruction cache's primary responsibility is to provide the instruction stream to the processor pipeline. Although, in many cases, stalls caused by instruction cache misses do not to have a major impact on performance, there are many cases for which instruction cache misses do have a major impact on performance. Examples of these types of cases that are well-known to have poor instruction cache behavior that negatively affect performance are server workloads and hardware/software co-design virtual machines.
To decrease performance loss due to the instruction cache misses, processors may use larger caches (and/or caches of higher associativity) and/or hardware prefetchers. Hardware prefetchers may be used to predict the instruction stream and issue prefetch requests for future instructions. However, there are scenarios that the hardware prefetchers are by construction unable to correctly predict the future stream.
Typically, the hardware prefetcher prefetches the addresses for instructions predicted by a branch prediction engine. This branch prediction engine predicts the future instructions that are to be executed based upon branch predictions. Because the prefetcher is tightly dependent on the branch prediction engine, the prefetcher often fails to issue the proper prefetch requests whenever the branch prediction engine fails to correctly predict the target of a branch. Therefore, improved instruction cache prefetching techniques are sought after.